xref: /illumos-kvm/linux/usr/include/asm-x86/kvm.h (revision 44f65dde)
1 #ifndef _ASM_X86_KVM_H
2 #define _ASM_X86_KVM_H
3 
4 /*
5  * KVM x86 specific structures and definitions
6  *
7  */
8 
9 #include <linux/types.h>
10 #include <linux/ioctl.h>
11 
12 /* Select x86 specific features in <linux/kvm.h> */
13 #define __KVM_HAVE_PIT
14 #define __KVM_HAVE_IOAPIC
15 #define __KVM_HAVE_DEVICE_ASSIGNMENT
16 #define __KVM_HAVE_MSI
17 #define __KVM_HAVE_USER_NMI
18 #define __KVM_HAVE_GUEST_DEBUG
19 #define __KVM_HAVE_MSIX
20 #define __KVM_HAVE_MCE
21 #define __KVM_HAVE_PIT_STATE2
22 #define __KVM_HAVE_XEN_HVM
23 #define __KVM_HAVE_VCPU_EVENTS
24 
25 /* Architectural interrupt line count. */
26 #define KVM_NR_INTERRUPTS 256
27 
28 struct kvm_memory_alias {
29 	__u32 slot;  /* this has a different namespace than memory slots */
30 	__u32 flags;
31 	__u64 guest_phys_addr;
32 	__u64 memory_size;
33 	__u64 target_phys_addr;
34 };
35 
36 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
37 struct kvm_pic_state {
38 	__u8 last_irr;	/* edge detection */
39 	__u8 irr;		/* interrupt request register */
40 	__u8 imr;		/* interrupt mask register */
41 	__u8 isr;		/* interrupt service register */
42 	__u8 priority_add;	/* highest irq priority */
43 	__u8 irq_base;
44 	__u8 read_reg_select;
45 	__u8 poll;
46 	__u8 special_mask;
47 	__u8 init_state;
48 	__u8 auto_eoi;
49 	__u8 rotate_on_auto_eoi;
50 	__u8 special_fully_nested_mode;
51 	__u8 init4;		/* true if 4 byte init */
52 	__u8 elcr;		/* PIIX edge/trigger selection */
53 	__u8 elcr_mask;
54 };
55 
56 #define KVM_IOAPIC_NUM_PINS  24
57 struct kvm_ioapic_state {
58 	__u64 base_address;
59 	__u32 ioregsel;
60 	__u32 id;
61 	__u32 irr;
62 	__u32 pad;
63 	union {
64 		__u64 bits;
65 		struct {
66 			__u8 vector;
67 			__u8 delivery_mode:3;
68 			__u8 dest_mode:1;
69 			__u8 delivery_status:1;
70 			__u8 polarity:1;
71 			__u8 remote_irr:1;
72 			__u8 trig_mode:1;
73 			__u8 mask:1;
74 			__u8 reserve:7;
75 			__u8 reserved[4];
76 			__u8 dest_id;
77 		} fields;
78 	} redirtbl[KVM_IOAPIC_NUM_PINS];
79 };
80 
81 #define KVM_IRQCHIP_PIC_MASTER   0
82 #define KVM_IRQCHIP_PIC_SLAVE    1
83 #define KVM_IRQCHIP_IOAPIC       2
84 #define KVM_NR_IRQCHIPS          3
85 
86 /* for KVM_GET_REGS and KVM_SET_REGS */
87 struct kvm_regs {
88 	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
89 	__u64 rax, rbx, rcx, rdx;
90 	__u64 rsi, rdi, rsp, rbp;
91 	__u64 r8,  r9,  r10, r11;
92 	__u64 r12, r13, r14, r15;
93 	__u64 rip, rflags;
94 };
95 
96 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
97 #define KVM_APIC_REG_SIZE 0x400
98 struct kvm_lapic_state {
99 	char regs[KVM_APIC_REG_SIZE];
100 };
101 
102 struct kvm_segment {
103 	__u64 base;
104 	__u32 limit;
105 	__u16 selector;
106 	__u8  type;
107 	__u8  present, dpl, db, s, l, g, avl;
108 	__u8  unusable;
109 	__u8  padding;
110 };
111 
112 struct kvm_dtable {
113 	__u64 base;
114 	__u16 limit;
115 	__u16 padding[3];
116 };
117 
118 
119 /* for KVM_GET_SREGS and KVM_SET_SREGS */
120 struct kvm_sregs {
121 	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
122 	struct kvm_segment cs, ds, es, fs, gs, ss;
123 	struct kvm_segment tr, ldt;
124 	struct kvm_dtable gdt, idt;
125 	__u64 cr0, cr2, cr3, cr4, cr8;
126 	__u64 efer;
127 	__u64 apic_base;
128 	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
129 };
130 
131 /* for KVM_GET_FPU and KVM_SET_FPU */
132 struct kvm_fpu {
133 	__u8  fpr[8][16];
134 	__u16 fcw;
135 	__u16 fsw;
136 	__u8  ftwx;  /* in fxsave format */
137 	__u8  pad1;
138 	__u16 last_opcode;
139 	__u64 last_ip;
140 	__u64 last_dp;
141 	__u8  xmm[16][16];
142 	__u32 mxcsr;
143 	__u32 pad2;
144 };
145 
146 struct kvm_msr_entry {
147 	__u32 index;
148 	__u32 reserved;
149 	__u64 data;
150 };
151 
152 /* for KVM_GET_MSRS and KVM_SET_MSRS */
153 struct kvm_msrs {
154 	__u32 nmsrs; /* number of msrs in entries */
155 	__u32 pad;
156 
157 	struct kvm_msr_entry entries[0];
158 };
159 
160 /* for KVM_GET_MSR_INDEX_LIST */
161 struct kvm_msr_list {
162 	__u32 nmsrs; /* number of msrs in entries */
163 	__u32 indices[0];
164 };
165 
166 
167 struct kvm_cpuid_entry {
168 	__u32 function;
169 	__u32 eax;
170 	__u32 ebx;
171 	__u32 ecx;
172 	__u32 edx;
173 	__u32 padding;
174 };
175 
176 /* for KVM_SET_CPUID */
177 struct kvm_cpuid {
178 	__u32 nent;
179 	__u32 padding;
180 	struct kvm_cpuid_entry entries[0];
181 };
182 
183 struct kvm_cpuid_entry2 {
184 	__u32 function;
185 	__u32 index;
186 	__u32 flags;
187 	__u32 eax;
188 	__u32 ebx;
189 	__u32 ecx;
190 	__u32 edx;
191 	__u32 padding[3];
192 };
193 
194 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
195 #define KVM_CPUID_FLAG_STATEFUL_FUNC    2
196 #define KVM_CPUID_FLAG_STATE_READ_NEXT  4
197 
198 /* for KVM_SET_CPUID2 */
199 struct kvm_cpuid2 {
200 	__u32 nent;
201 	__u32 padding;
202 	struct kvm_cpuid_entry2 entries[0];
203 };
204 
205 /* for KVM_GET_PIT and KVM_SET_PIT */
206 struct kvm_pit_channel_state {
207 	__u32 count; /* can be 65536 */
208 	__u16 latched_count;
209 	__u8 count_latched;
210 	__u8 status_latched;
211 	__u8 status;
212 	__u8 read_state;
213 	__u8 write_state;
214 	__u8 write_latch;
215 	__u8 rw_mode;
216 	__u8 mode;
217 	__u8 bcd;
218 	__u8 gate;
219 	__s64 count_load_time;
220 };
221 
222 struct kvm_debug_exit_arch {
223 	__u32 exception;
224 	__u32 pad;
225 	__u64 pc;
226 	__u64 dr6;
227 	__u64 dr7;
228 };
229 
230 #define KVM_GUESTDBG_USE_SW_BP		0x00010000
231 #define KVM_GUESTDBG_USE_HW_BP		0x00020000
232 #define KVM_GUESTDBG_INJECT_DB		0x00040000
233 #define KVM_GUESTDBG_INJECT_BP		0x00080000
234 
235 /* for KVM_SET_GUEST_DEBUG */
236 struct kvm_guest_debug_arch {
237 	__u64 debugreg[8];
238 };
239 
240 struct kvm_pit_state {
241 	struct kvm_pit_channel_state channels[3];
242 };
243 
244 #define KVM_PIT_FLAGS_HPET_LEGACY  0x00000001
245 
246 struct kvm_pit_state2 {
247 	struct kvm_pit_channel_state channels[3];
248 	__u32 flags;
249 	__u32 reserved[9];
250 };
251 
252 struct kvm_reinject_control {
253 	__u8 pit_reinject;
254 	__u8 reserved[31];
255 };
256 
257 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
258 #define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001
259 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002
260 
261 /* for KVM_GET/SET_VCPU_EVENTS */
262 struct kvm_vcpu_events {
263 	struct {
264 		__u8 injected;
265 		__u8 nr;
266 		__u8 has_error_code;
267 		__u8 pad;
268 		__u32 error_code;
269 	} exception;
270 	struct {
271 		__u8 injected;
272 		__u8 nr;
273 		__u8 soft;
274 		__u8 pad;
275 	} interrupt;
276 	struct {
277 		__u8 injected;
278 		__u8 pending;
279 		__u8 masked;
280 		__u8 pad;
281 	} nmi;
282 	__u32 sipi_vector;
283 	__u32 flags;
284 	__u32 reserved[10];
285 };
286 
287 #endif /* _ASM_X86_KVM_H */
288