xref: /illumos-kvm/kvm_bitops.h (revision 9621d522)
1 /*
2  * GPL HEADER START
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program; if not, write to the Free Software
15  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
16  *
17  * GPL HEADER END
18  */
19 
20 #ifndef _ASM_X86_BITOPS_H
21 #define	_ASM_X86_BITOPS_H
22 
23 /*
24  * Copyright 1992, Linus Torvalds.
25  * Copyright (c) 2012, Joyent, Inc.
26  *
27  * Note: inlines with more than a single statement should be marked
28  * __always_inline to avoid problems with older gcc's inlining heuristics.
29  */
30 
31 #include <sys/types.h>
32 
33 #define	DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
34 #define	BITS_TO_LONGS(nr)	DIV_ROUND_UP(nr, 8 * sizeof (long))
35 
36 /*
37  * These have to be done with inline assembly: that way the bit-setting
38  * is guaranteed to be atomic. All bit operations return 0 if the bit
39  * was cleared before the operation and != 0 if it was not.
40  *
41  * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
42  */
43 #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
44 /*
45  * Technically wrong, but this avoids compilation errors on some gcc
46  * versions.
47  */
48 #define	BITOP_ADDR(x) "=m" (*(volatile long *) (x))
49 #else
50 #define	BITOP_ADDR(x) "+m" (*(volatile long *) (x))
51 #endif
52 
53 #define	ADDR	BITOP_ADDR(addr)
54 
55 /*
56  * We do the locked ops that don't return the old value as
57  * a mask operation on a byte.
58  */
59 #define	IS_IMMEDIATE(nr)		(__builtin_constant_p(nr))
60 #define	CONST_MASK_ADDR(nr, addr)	\
61 	BITOP_ADDR((uintptr_t)(addr) + ((nr) >> 3))
62 #define	CONST_MASK(nr)			(1 << ((nr) & 7))
63 
64 /*
65  * set_bit - Atomically set a bit in memory
66  * @nr: the bit to set
67  * @addr: the address to start counting from
68  *
69  * This function is atomic and may not be reordered.  See __set_bit()
70  * if you do not require the atomic guarantees.
71  *
72  * Note: there are no guarantees that this function will not be reordered
73  * on non x86 architectures, so if you are writing portable code,
74  * make sure not to rely on its reordering guarantees.
75  *
76  * Note that @nr may be almost arbitrarily large; this function is not
77  * restricted to acting on a single-word quantity.
78  */
79 static inline void
set_bit(unsigned int nr,volatile unsigned long * addr)80 set_bit(unsigned int nr, volatile unsigned long *addr)
81 {
82 	if (IS_IMMEDIATE(nr)) {
83 		__asm__ volatile("lock orb %1,%0"
84 			: CONST_MASK_ADDR(nr, addr)
85 			: "iq" ((uint8_t)CONST_MASK(nr))
86 			: "memory");
87 	} else {
88 		__asm__ volatile("lock bts %1,%0"
89 			: BITOP_ADDR(addr) : "Ir" (nr) : "memory");
90 	}
91 }
92 
93 /*
94  * __set_bit - Set a bit in memory
95  * @nr: the bit to set
96  * @addr: the address to start counting from
97  *
98  * Unlike set_bit(), this function is non-atomic and may be reordered.
99  * If it's called on the same region of memory simultaneously, the effect
100  * may be that only one operation succeeds.
101  */
102 static inline void
__set_bit(int nr,volatile unsigned long * addr)103 __set_bit(int nr, volatile unsigned long *addr)
104 {
105 	__asm__ volatile("bts %1,%0" : ADDR : "Ir" (nr) : "memory");
106 }
107 
108 /*
109  * clear_bit - Clears a bit in memory
110  * @nr: Bit to clear
111  * @addr: Address to start counting from
112  *
113  * clear_bit() is atomic and may not be reordered.  However, it does
114  * not contain a memory barrier, so if it is used for locking purposes,
115  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
116  * in order to ensure changes are visible on other processors.
117  */
118 static inline void
clear_bit(int nr,volatile unsigned long * addr)119 clear_bit(int nr, volatile unsigned long *addr)
120 {
121 	if (IS_IMMEDIATE(nr)) {
122 		__asm__ volatile("lock andb %1,%0"
123 			: CONST_MASK_ADDR(nr, addr)
124 			: "iq" ((uint8_t)~CONST_MASK(nr)));
125 	} else {
126 		__asm__ volatile("lock btr %1,%0"
127 			: BITOP_ADDR(addr)
128 			: "Ir" (nr));
129 	}
130 }
131 
132 static inline void
__clear_bit(int nr,volatile unsigned long * addr)133 __clear_bit(int nr, volatile unsigned long *addr)
134 {
135 	__asm__ volatile("btr %1,%0" : ADDR : "Ir" (nr));
136 }
137 
138 /*
139  * test_and_set_bit - Set a bit and return its old value
140  * @nr: Bit to set
141  * @addr: Address to count from
142  *
143  * This operation is atomic and cannot be reordered.
144  * It also implies a memory barrier.
145  */
146 static inline int
test_and_set_bit(int nr,volatile unsigned long * addr)147 test_and_set_bit(int nr, volatile unsigned long *addr)
148 {
149 	int oldbit;
150 
151 	__asm__ volatile("lock bts %2,%1\n\t"
152 	    "sbb %0,%0" : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
153 
154 	return (oldbit);
155 }
156 
157 /*
158  * __test_and_set_bit - Set a bit and return its old value
159  * @nr: Bit to set
160  * @addr: Address to count from
161  *
162  * This operation is non-atomic and can be reordered.
163  * If two examples of this operation race, one can appear to succeed
164  * but actually fail.  You must protect multiple accesses with a lock.
165  */
166 static inline int
__test_and_set_bit(int nr,volatile unsigned long * addr)167 __test_and_set_bit(int nr, volatile unsigned long *addr)
168 {
169 	int oldbit;
170 
171 	__asm__("bts %2,%1\n\t"
172 	    "sbb %0,%0"
173 	    : "=r" (oldbit), ADDR
174 	    : "Ir" (nr));
175 	return (oldbit);
176 }
177 
178 /*
179  * test_and_clear_bit - Clear a bit and return its old value
180  * @nr: Bit to clear
181  * @addr: Address to count from
182  *
183  * This operation is atomic and cannot be reordered.
184  * It also implies a memory barrier.
185  */
186 static inline int
test_and_clear_bit(int nr,volatile unsigned long * addr)187 test_and_clear_bit(int nr, volatile unsigned long *addr)
188 {
189 	int oldbit;
190 
191 	__asm__ volatile("lock btr %2,%1\n\t"
192 	    "sbb %0,%0"
193 	    : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
194 
195 	return (oldbit);
196 }
197 
198 /*
199  * __test_and_clear_bit - Clear a bit and return its old value
200  * @nr: Bit to clear
201  * @addr: Address to count from
202  *
203  * This operation is non-atomic and can be reordered.
204  * If two examples of this operation race, one can appear to succeed
205  * but actually fail.  You must protect multiple accesses with a lock.
206  */
207 static inline int
__test_and_clear_bit(int nr,volatile unsigned long * addr)208 __test_and_clear_bit(int nr, volatile unsigned long *addr)
209 {
210 	int oldbit;
211 
212 	__asm__ volatile("btr %2,%1\n\t"
213 	    "sbb %0,%0"
214 	    : "=r" (oldbit), ADDR
215 	    : "Ir" (nr));
216 
217 	return (oldbit);
218 }
219 
220 static inline int
constant_test_bit(unsigned int nr,const volatile unsigned long * addr)221 constant_test_bit(unsigned int nr, const volatile unsigned long *addr)
222 {
223 	return (((1UL << (nr % 64)) &
224 		(((unsigned long *)addr)[nr / 64])) != 0);
225 }
226 
227 static inline int
variable_test_bit(int nr,volatile const unsigned long * addr)228 variable_test_bit(int nr, volatile const unsigned long *addr)
229 {
230 	int oldbit;
231 
232 	__asm__ volatile("bt %2,%1\n\t"
233 	    "sbb %0,%0"
234 	    : "=r" (oldbit)
235 	    : "m" (*(unsigned long *)addr), "Ir" (nr));
236 
237 	return (oldbit);
238 }
239 
240 /*
241  * test_bit - Determine whether a bit is set
242  * @nr: bit number to test
243  * @addr: Address to start counting from
244  */
245 
246 #define	test_bit(nr, addr)			\
247 	(__builtin_constant_p((nr))		\
248 	? constant_test_bit((nr), (addr))	\
249 	: variable_test_bit((nr), (addr)))
250 
251 /*
252  * __ffs - find first set bit in word
253  * @word: The word to search
254  *
255  * Undefined if no bit exists, so code should check against 0 first.
256  */
257 static inline unsigned long
__ffs(unsigned long word)258 __ffs(unsigned long word)
259 {
260 	__asm__("bsf %1,%0"
261 		: "=r" (word)
262 		: "rm" (word));
263 	return (word);
264 }
265 
266 /*
267  * ffz - find first zero bit in word
268  * @word: The word to search
269  *
270  * Undefined if no zero exists, so code should check against ~0UL first.
271  */
272 static inline unsigned long
ffz(unsigned long word)273 ffz(unsigned long word)
274 {
275 	__asm__("bsf %1,%0"
276 		: "=r" (word)
277 		: "r" (~word));
278 	return (word);
279 }
280 
281 /*
282  * __fls: find last set bit in word
283  * @word: The word to search
284  *
285  * Undefined if no set bit exists, so code should check against 0 first.
286  */
287 static inline unsigned long
__fls(unsigned long word)288 __fls(unsigned long word)
289 {
290 	__asm__("bsr %1,%0"
291 	    : "=r" (word)
292 	    : "rm" (word));
293 	return (word);
294 }
295 
296 #endif /* _ASM_X86_BITOPS_H */
297