xref: /illumos-kvm/hyperv.h (revision 2a9ff8dc)
1 /*
2  * GPL HEADER START
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program; if not, write to the Free Software
15  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
16  *
17  * GPL HEADER END
18  *
19  * Copyright 2011 various Linux Kernel contributors.
20  * Copyright 2011 Joyent, Inc. All Rights Reserved.
21  */
22 
23 #ifndef _ASM_X86_KVM_HYPERV_H
24 #define _ASM_X86_KVM_HYPERV_H
25 
26 /*
27  * The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
28  * is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
29  */
30 #define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS	0x40000000
31 #define HYPERV_CPUID_INTERFACE			0x40000001
32 #define HYPERV_CPUID_VERSION			0x40000002
33 #define HYPERV_CPUID_FEATURES			0x40000003
34 #define HYPERV_CPUID_ENLIGHTMENT_INFO		0x40000004
35 #define HYPERV_CPUID_IMPLEMENT_LIMITS		0x40000005
36 
37 /*
38  * Feature identification. EAX indicates which features are available
39  * to the partition based upon the current partition privileges.
40  */
41 
42 /* VP Runtime (HV_X64_MSR_VP_RUNTIME) available */
43 #define HV_X64_MSR_VP_RUNTIME_AVAILABLE		(1 << 0)
44 /* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/
45 #define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE	(1 << 1)
46 /*
47  * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
48  * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available
49  */
50 #define HV_X64_MSR_SYNIC_AVAILABLE		(1 << 2)
51 /*
52  * Synthetic Timer MSRs (HV_X64_MSR_STIMER0_CONFIG through
53  * HV_X64_MSR_STIMER3_COUNT) available
54  */
55 #define HV_X64_MSR_SYNTIMER_AVAILABLE		(1 << 3)
56 /*
57  * APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
58  * are available
59  */
60 #define HV_X64_MSR_APIC_ACCESS_AVAILABLE	(1 << 4)
61 /* Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL) available*/
62 #define HV_X64_MSR_HYPERCALL_AVAILABLE		(1 << 5)
63 /* Access virtual processor index MSR (HV_X64_MSR_VP_INDEX) available*/
64 #define HV_X64_MSR_VP_INDEX_AVAILABLE		(1 << 6)
65 /* Virtual system reset MSR (HV_X64_MSR_RESET) is available*/
66 #define HV_X64_MSR_RESET_AVAILABLE		(1 << 7)
67  /*
68   * Access statistics pages MSRs (HV_X64_MSR_STATS_PARTITION_RETAIL_PAGE,
69   * HV_X64_MSR_STATS_PARTITION_INTERNAL_PAGE, HV_X64_MSR_STATS_VP_RETAIL_PAGE,
70   * HV_X64_MSR_STATS_VP_INTERNAL_PAGE) available
71   */
72 #define HV_X64_MSR_STAT_PAGES_AVAILABLE		(1 << 8)
73 
74 /*
75  * Feature identification: EBX indicates which flags were specified at
76  * partition creation. The format is the same as the partition creation
77  * flag structure defined in section Partition Creation Flags.
78  */
79 #define HV_X64_CREATE_PARTITIONS		(1 << 0)
80 #define HV_X64_ACCESS_PARTITION_ID		(1 << 1)
81 #define HV_X64_ACCESS_MEMORY_POOL		(1 << 2)
82 #define HV_X64_ADJUST_MESSAGE_BUFFERS		(1 << 3)
83 #define HV_X64_POST_MESSAGES			(1 << 4)
84 #define HV_X64_SIGNAL_EVENTS			(1 << 5)
85 #define HV_X64_CREATE_PORT			(1 << 6)
86 #define HV_X64_CONNECT_PORT			(1 << 7)
87 #define HV_X64_ACCESS_STATS			(1 << 8)
88 #define HV_X64_DEBUGGING			(1 << 11)
89 #define HV_X64_CPU_POWER_MANAGEMENT		(1 << 12)
90 #define HV_X64_CONFIGURE_PROFILER		(1 << 13)
91 
92 /*
93  * Feature identification. EDX indicates which miscellaneous features
94  * are available to the partition.
95  */
96 /* The MWAIT instruction is available (per section MONITOR / MWAIT) */
97 #define HV_X64_MWAIT_AVAILABLE				(1 << 0)
98 /* Guest debugging support is available */
99 #define HV_X64_GUEST_DEBUGGING_AVAILABLE		(1 << 1)
100 /* Performance Monitor support is available*/
101 #define HV_X64_PERF_MONITOR_AVAILABLE			(1 << 2)
102 /* Support for physical CPU dynamic partitioning events is available*/
103 #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE	(1 << 3)
104 /*
105  * Support for passing hypercall input parameter block via XMM
106  * registers is available
107  */
108 #define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE		(1 << 4)
109 /* Support for a virtual guest idle state is available */
110 #define HV_X64_GUEST_IDLE_STATE_AVAILABLE		(1 << 5)
111 
112 /*
113  * Implementation recommendations. Indicates which behaviors the hypervisor
114  * recommends the OS implement for optimal performance.
115  */
116  /*
117   * Recommend using hypercall for address space switches rather
118   * than MOV to CR3 instruction
119   */
120 #define HV_X64_MWAIT_RECOMMENDED		(1 << 0)
121 /* Recommend using hypercall for local TLB flushes rather
122  * than INVLPG or MOV to CR3 instructions */
123 #define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED	(1 << 1)
124 /*
125  * Recommend using hypercall for remote TLB flushes rather
126  * than inter-processor interrupts
127  */
128 #define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED	(1 << 2)
129 /*
130  * Recommend using MSRs for accessing APIC registers
131  * EOI, ICR and TPR rather than their memory-mapped counterparts
132  */
133 #define HV_X64_APIC_ACCESS_RECOMMENDED		(1 << 3)
134 /* Recommend using the hypervisor-provided MSR to initiate a system RESET */
135 #define HV_X64_SYSTEM_RESET_RECOMMENDED		(1 << 4)
136 /*
137  * Recommend using relaxed timing for this partition. If used,
138  * the VM should disable any watchdog timeouts that rely on the
139  * timely delivery of external interrupts
140  */
141 #define HV_X64_RELAXED_TIMING_RECOMMENDED	(1 << 5)
142 
143 /* MSR used to identify the guest OS. */
144 #define HV_X64_MSR_GUEST_OS_ID			0x40000000
145 
146 /* MSR used to setup pages used to communicate with the hypervisor. */
147 #define HV_X64_MSR_HYPERCALL			0x40000001
148 
149 /* MSR used to provide vcpu index */
150 #define HV_X64_MSR_VP_INDEX			0x40000002
151 
152 /* Define the virtual APIC registers */
153 #define HV_X64_MSR_EOI				0x40000070
154 #define HV_X64_MSR_ICR				0x40000071
155 #define HV_X64_MSR_TPR				0x40000072
156 #define HV_X64_MSR_APIC_ASSIST_PAGE		0x40000073
157 
158 /* Define synthetic interrupt controller model specific registers. */
159 #define HV_X64_MSR_SCONTROL			0x40000080
160 #define HV_X64_MSR_SVERSION			0x40000081
161 #define HV_X64_MSR_SIEFP			0x40000082
162 #define HV_X64_MSR_SIMP				0x40000083
163 #define HV_X64_MSR_EOM				0x40000084
164 #define HV_X64_MSR_SINT0			0x40000090
165 #define HV_X64_MSR_SINT1			0x40000091
166 #define HV_X64_MSR_SINT2			0x40000092
167 #define HV_X64_MSR_SINT3			0x40000093
168 #define HV_X64_MSR_SINT4			0x40000094
169 #define HV_X64_MSR_SINT5			0x40000095
170 #define HV_X64_MSR_SINT6			0x40000096
171 #define HV_X64_MSR_SINT7			0x40000097
172 #define HV_X64_MSR_SINT8			0x40000098
173 #define HV_X64_MSR_SINT9			0x40000099
174 #define HV_X64_MSR_SINT10			0x4000009A
175 #define HV_X64_MSR_SINT11			0x4000009B
176 #define HV_X64_MSR_SINT12			0x4000009C
177 #define HV_X64_MSR_SINT13			0x4000009D
178 #define HV_X64_MSR_SINT14			0x4000009E
179 #define HV_X64_MSR_SINT15			0x4000009F
180 
181 
182 #define HV_X64_MSR_HYPERCALL_ENABLE		0x00000001
183 #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT	12
184 #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK	\
185 		(~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
186 
187 /* Declare the various hypercall operations. */
188 #define HV_X64_HV_NOTIFY_LONG_SPIN_WAIT		0x0008
189 
190 #define HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE		0x00000001
191 #define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT	12
192 #define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_MASK	\
193 		(~((1ull << HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
194 
195 #define HV_PROCESSOR_POWER_STATE_C0		0
196 #define HV_PROCESSOR_POWER_STATE_C1		1
197 #define HV_PROCESSOR_POWER_STATE_C2		2
198 #define HV_PROCESSOR_POWER_STATE_C3		3
199 
200 /* hypercall status code */
201 #define HV_STATUS_SUCCESS			0
202 #define HV_STATUS_INVALID_HYPERCALL_CODE	2
203 #define HV_STATUS_INVALID_HYPERCALL_INPUT	3
204 #define HV_STATUS_INVALID_ALIGNMENT		4
205 
206 #endif
207