xref: /illumos-kvm-cmd/trace-events (revision 4f48eea6)
1# Trace events for debugging and performance instrumentation
2#
3# This file is processed by the tracetool script during the build.
4#
5# To add a new trace event:
6#
7# 1. Choose a name for the trace event.  Declare its arguments and format
8#    string.
9#
10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
11#    trace_multiwrite_cb().  The source file must #include "trace.h".
12#
13# Format of a trace event:
14#
15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
16#
17# Example: qemu_malloc(size_t size) "size %zu"
18#
19# The "disable" keyword will build without the trace event.
20# In case of 'simple' trace backend, it will allow the trace event to be
21# compiled, but this would be turned off by default. It can be toggled on via
22# the monitor.
23#
24# The <name> must be a valid as a C function name.
25#
26# Types should be standard C types.  Use void * for pointers because the trace
27# system may not have the necessary headers included.
28#
29# The <format-string> should be a sprintf()-compatible format string.
30
31# qemu-malloc.c
32disable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p"
33disable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
34disable qemu_free(void *ptr) "ptr %p"
35
36# osdep.c
37disable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
38disable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
39disable qemu_vfree(void *ptr) "ptr %p"
40
41# qemu-timer.c
42disable qemu_mod_timer(void *ptr, int64_t expire, int64_t interval) "ptr %p expire %d interval %d"
43disable qemu_run_timer(void *ptr, int64_t expire, int64_t current_time) "ptr %p expire %d current_time %d"
44disable multiticks_assign(void *ptr, int source) "ptr %p source %d"
45disable multiticks_reap(int source, int64_t prog, int64_t interval) "source %d prog %d intrval %d"
46disable multiticks_program(void *ptr, int64_t expire, int64_t interval) "ptr %p expire %d interval %d"
47disable multiticks_inband(void *ptr, int64_t low, int64_t high, int64_t fire) "ptr %p low %d high %d fire %d"
48disable multiticks_outofband(void *ptr, int64_t low, int64_t high, int64_t fire) "ptr %p low %d high %d fire %d"
49
50# hw/virtio.c
51disable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
52disable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
53disable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
54disable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
55disable virtio_irq(void *vq) "vq %p"
56disable virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
57
58# block.c
59disable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
60disable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
61disable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
62disable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
63disable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
64disable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
65
66# hw/virtio-blk.c
67disable virtio_blk_req_complete(void *req, int status) "req %p status %d"
68disable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
69disable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
70
71# posix-aio-compat.c
72disable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
73
74# ioport.c
75disable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
76disable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
77
78# balloon.c
79# Since requests are raised via monitor, not many tracepoints are needed.
80disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
81
82# hw/apic.c
83disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
84disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d"
85disable cpu_set_apic_base(uint64_t val) "%016"PRIx64""
86disable cpu_get_apic_base(uint64_t val) "%016"PRIx64""
87disable apic_mem_readl(uint64_t addr, uint32_t val)  "%"PRIx64" = %08x"
88disable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
89# coalescing
90disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
91disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
92disable apic_set_irq(int apic_irq_delivered) "coalescing %d"
93
94# hw/cs4231.c
95disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
96disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
97disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
98disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
99
100# hw/eccmemctl.c
101disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
102disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
103disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
104disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
105disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
106disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
107disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
108disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
109disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
110disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
111disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
112disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
113disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
114disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
115disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
116disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
117disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
118disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
119
120# hw/lance.c
121disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
122disable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
123
124# hw/slavio_intctl.c
125disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
126disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
127disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
128disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
129disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
130disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
131disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
132disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
133disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
134disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
135disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
136disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
137
138# hw/slavio_misc.c
139disable slavio_misc_update_irq_raise(void) "Raise IRQ"
140disable slavio_misc_update_irq_lower(void) "Lower IRQ"
141disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
142disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
143disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
144disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
145disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
146disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
147disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
148disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
149disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
150disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
151disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
152disable apc_mem_writeb(uint32_t val) "Write power management %02x"
153disable apc_mem_readb(uint32_t ret) "Read power management %02x"
154disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
155disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
156disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
157disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
158
159# hw/slavio_timer.c
160disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
161disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
162disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64""
163disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
164disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
165disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64""
166disable slavio_timer_mem_writel_counter_invalid(void) "not user timer"
167disable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
168disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
169disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
170disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
171disable slavio_timer_mem_writel_mode_invalid(void) "not system timer"
172disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64""
173
174# hw/sparc32_dma.c
175disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
176disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
177disable sparc32_dma_set_irq_raise(void) "Raise IRQ"
178disable sparc32_dma_set_irq_lower(void) "Lower IRQ"
179disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
180disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
181disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
182disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
183disable sparc32_dma_enable_raise(void) "Raise DMA enable"
184disable sparc32_dma_enable_lower(void) "Lower DMA enable"
185
186# hw/sun4m.c
187disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
188disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
189disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
190disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
191
192# hw/sun4m_iommu.c
193disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
194disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
195disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
196disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
197disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
198disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
199disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
200disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
201
202# hw/usb-desc.c
203disable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
204disable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
205disable usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
206disable usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
207disable usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
208disable usb_set_addr(int addr) "dev %d"
209disable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
210disable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
211disable usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
212
213# vl.c
214disable vm_state_notify(int running, int reason) "running %d reason %d"
215
216# block/qed-l2-cache.c
217disable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
218disable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
219disable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
220
221# block/qed-table.c
222disable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
223disable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
224disable qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
225disable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
226
227# block/qed.c
228disable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
229disable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
230disable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64""
231disable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
232disable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
233disable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
234disable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
235disable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
236
237# hw/grlib_gptimer.c
238disable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
239disable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
240disable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
241disable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
242disable grlib_gptimer_hit(int id) "timer:%d HIT"
243disable grlib_gptimer_readl(int id, const char *s, uint32_t val) "timer:%d %s 0x%x"
244disable grlib_gptimer_writel(int id, const char *s, uint32_t val) "timer:%d %s 0x%x"
245disable grlib_gptimer_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64""
246
247# hw/grlib_irqmp.c
248disable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n"
249disable grlib_irqmp_ack(int intno) "interrupt:%d"
250disable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
251disable grlib_irqmp_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64""
252
253# hw/grlib_apbuart.c
254disable grlib_apbuart_event(int event) "event:%d"
255disable grlib_apbuart_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64""
256
257# hw/leon3.c
258disable leon3_set_irq(int intno) "Set CPU IRQ %d"
259disable leon3_reset_irq(int intno) "Reset CPU IRQ %d"
260
261# spice-qemu-char.c
262disable spice_vmc_write(ssize_t out, int len) "spice wrottn %lu of requested %zd"
263disable spice_vmc_read(int bytes, int len) "spice read %lu of requested %zd"
264disable spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
265disable spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
266