xref: /illumos-kvm-cmd/qemu-kvm-x86.c (revision e0ffedd6)
1 /*
2  * qemu/kvm integration, x86 specific code
3  *
4  * Copyright (C) 2006-2008 Qumranet Technologies
5  * Portions Copyright 2018 Joyent, Inc.
6  *
7  * Licensed under the terms of the GNU GPL version 2 or higher.
8  */
9 
10 #include "config.h"
11 #include "config-host.h"
12 
13 #include <string.h>
14 #include "hw/hw.h"
15 #include "gdbstub.h"
16 #ifdef __linux__
17 #include <sys/io.h>
18 #endif
19 
20 #include "qemu-kvm.h"
21 #include "libkvm.h"
22 #include <pthread.h>
23 #include <sys/utsname.h>
24 #ifdef CONFIG_KVM_PARA
25 #include <sys/kvm_para.h>
26 #endif
27 #include <sys/ioctl.h>
28 
29 #include "kvm.h"
30 #include "hw/apic.h"
31 
32 #define MSR_IA32_TSC            0x10
33 
34 static struct kvm_msr_list *kvm_msr_list;
35 extern unsigned int kvm_shadow_memory;
36 
kvm_set_tss_addr(kvm_context_t kvm,unsigned long addr)37 int kvm_set_tss_addr(kvm_context_t kvm, unsigned long addr)
38 {
39     int r;
40 
41     r = kvm_vm_ioctl(kvm_state, KVM_SET_TSS_ADDR, addr);
42     if (r < 0) {
43         fprintf(stderr, "kvm_set_tss_addr: %m\n");
44         return r;
45     }
46     return 0;
47 }
48 
kvm_init_tss(kvm_context_t kvm)49 static int kvm_init_tss(kvm_context_t kvm)
50 {
51     int r;
52 
53     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_TSS_ADDR);
54     if (r > 0) {
55         /*
56          * this address is 3 pages before the bios, and the bios should present
57          * as unavaible memory
58          */
59         r = kvm_set_tss_addr(kvm, 0xfeffd000);
60         if (r < 0) {
61             fprintf(stderr, "kvm_init_tss: unable to set tss addr\n");
62             return r;
63         }
64     } else {
65         fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
66     }
67     return 0;
68 }
69 
kvm_set_identity_map_addr(kvm_context_t kvm,uint64_t addr)70 static int kvm_set_identity_map_addr(kvm_context_t kvm, uint64_t addr)
71 {
72 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
73     int r;
74 
75     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
76     if (r > 0) {
77         r = kvm_vm_ioctl(kvm_state, KVM_SET_IDENTITY_MAP_ADDR, &addr);
78         if (r == -1) {
79             fprintf(stderr, "kvm_set_identity_map_addr: %m\n");
80             return -errno;
81         }
82         return 0;
83     }
84 #endif
85     return -ENOSYS;
86 }
87 
kvm_init_identity_map_page(kvm_context_t kvm)88 static int kvm_init_identity_map_page(kvm_context_t kvm)
89 {
90 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
91     int r;
92 
93     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
94     if (r > 0) {
95         /*
96          * this address is 4 pages before the bios, and the bios should present
97          * as unavaible memory
98          */
99         r = kvm_set_identity_map_addr(kvm, 0xfeffc000);
100         if (r < 0) {
101             fprintf(stderr, "kvm_init_identity_map_page: "
102                     "unable to set identity mapping addr\n");
103             return r;
104         }
105     }
106 #endif
107     return 0;
108 }
109 
kvm_create_pit(kvm_context_t kvm)110 static int kvm_create_pit(kvm_context_t kvm)
111 {
112 #ifdef KVM_CAP_PIT
113     int r;
114 
115     kvm_state->pit_in_kernel = 0;
116     if (!kvm->no_pit_creation) {
117         r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_PIT);
118         if (r > 0) {
119             r = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT);
120             if (r >= 0) {
121                 kvm_state->pit_in_kernel = 1;
122             } else {
123                 fprintf(stderr, "Create kernel PIC irqchip failed\n");
124                 return r;
125             }
126         }
127     }
128 #endif
129     return 0;
130 }
131 
kvm_arch_create(kvm_context_t kvm,unsigned long phys_mem_bytes,void ** vm_mem)132 int kvm_arch_create(kvm_context_t kvm, unsigned long phys_mem_bytes,
133                         void **vm_mem)
134 {
135     int r = 0;
136 
137     r = kvm_init_tss(kvm);
138     if (r < 0) {
139         return r;
140     }
141 
142     r = kvm_init_identity_map_page(kvm);
143     if (r < 0) {
144         return r;
145     }
146 
147     /*
148      * Tell fw_cfg to notify the BIOS to reserve the range.
149      */
150     if (e820_add_entry(0xfeffc000, 0x4000, E820_RESERVED) < 0) {
151         perror("e820_add_entry() table is full");
152         exit(1);
153     }
154 
155     r = kvm_create_pit(kvm);
156     if (r < 0) {
157         return r;
158     }
159 
160     r = kvm_init_coalesced_mmio(kvm);
161     if (r < 0) {
162         return r;
163     }
164 
165     return 0;
166 }
167 
168 #ifdef KVM_EXIT_TPR_ACCESS
169 
kvm_handle_tpr_access(CPUState * env)170 static int kvm_handle_tpr_access(CPUState *env)
171 {
172     struct kvm_run *run = env->kvm_run;
173     kvm_tpr_access_report(env,
174                           run->tpr_access.rip,
175                           run->tpr_access.is_write);
176     return 0;
177 }
178 
179 
kvm_enable_vapic(CPUState * env,uint64_t vapic)180 int kvm_enable_vapic(CPUState *env, uint64_t vapic)
181 {
182     struct kvm_vapic_addr va = {
183         .vapic_addr = vapic,
184     };
185 
186     return kvm_vcpu_ioctl(env, KVM_SET_VAPIC_ADDR, &va);
187 }
188 
189 #endif
190 
kvm_arch_run(CPUState * env)191 int kvm_arch_run(CPUState *env)
192 {
193     int r = 0;
194     struct kvm_run *run = env->kvm_run;
195 
196     switch (run->exit_reason) {
197 #ifdef KVM_EXIT_SET_TPR
198     case KVM_EXIT_SET_TPR:
199         break;
200 #endif
201 #ifdef KVM_EXIT_TPR_ACCESS
202     case KVM_EXIT_TPR_ACCESS:
203         r = kvm_handle_tpr_access(env);
204         break;
205 #endif
206     default:
207         r = 1;
208         break;
209     }
210 
211     return r;
212 }
213 
214 #ifdef KVM_CAP_IRQCHIP
215 
kvm_get_lapic(CPUState * env,struct kvm_lapic_state * s)216 int kvm_get_lapic(CPUState *env, struct kvm_lapic_state *s)
217 {
218     int r = 0;
219 
220     if (!kvm_irqchip_in_kernel()) {
221         return r;
222     }
223 
224     r = kvm_vcpu_ioctl(env, KVM_GET_LAPIC, s);
225     if (r < 0) {
226         fprintf(stderr, "KVM_GET_LAPIC failed\n");
227     }
228     return r;
229 }
230 
kvm_set_lapic(CPUState * env,struct kvm_lapic_state * s)231 int kvm_set_lapic(CPUState *env, struct kvm_lapic_state *s)
232 {
233     int r = 0;
234 
235     if (!kvm_irqchip_in_kernel()) {
236         return 0;
237     }
238 
239     r = kvm_vcpu_ioctl(env, KVM_SET_LAPIC, s);
240 
241     if (r < 0) {
242         fprintf(stderr, "KVM_SET_LAPIC failed\n");
243     }
244     return r;
245 }
246 
247 #endif
248 
249 #ifdef KVM_CAP_PIT
250 
kvm_get_pit(kvm_context_t kvm,struct kvm_pit_state * s)251 int kvm_get_pit(kvm_context_t kvm, struct kvm_pit_state *s)
252 {
253     if (!kvm_pit_in_kernel()) {
254         return 0;
255     }
256     return kvm_vm_ioctl(kvm_state, KVM_GET_PIT, s);
257 }
258 
kvm_set_pit(kvm_context_t kvm,struct kvm_pit_state * s)259 int kvm_set_pit(kvm_context_t kvm, struct kvm_pit_state *s)
260 {
261     if (!kvm_pit_in_kernel()) {
262         return 0;
263     }
264     return kvm_vm_ioctl(kvm_state, KVM_SET_PIT, s);
265 }
266 
267 #ifdef KVM_CAP_PIT_STATE2
kvm_get_pit2(kvm_context_t kvm,struct kvm_pit_state2 * ps2)268 int kvm_get_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
269 {
270     if (!kvm_pit_in_kernel()) {
271         return 0;
272     }
273     return kvm_vm_ioctl(kvm_state, KVM_GET_PIT2, ps2);
274 }
275 
kvm_set_pit2(kvm_context_t kvm,struct kvm_pit_state2 * ps2)276 int kvm_set_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
277 {
278     if (!kvm_pit_in_kernel()) {
279         return 0;
280     }
281     return kvm_vm_ioctl(kvm_state, KVM_SET_PIT2, ps2);
282 }
283 
284 #endif
285 #endif
286 
kvm_has_pit_state2(kvm_context_t kvm)287 int kvm_has_pit_state2(kvm_context_t kvm)
288 {
289     int r = 0;
290 
291 #ifdef KVM_CAP_PIT_STATE2
292     r = kvm_check_extension(kvm_state, KVM_CAP_PIT_STATE2);
293 #endif
294     return r;
295 }
296 
kvm_show_code(CPUState * env)297 void kvm_show_code(CPUState *env)
298 {
299 #define SHOW_CODE_LEN 50
300     struct kvm_regs regs;
301     struct kvm_sregs sregs;
302     int r, n;
303     int back_offset;
304     unsigned char code;
305     char code_str[SHOW_CODE_LEN * 3 + 1];
306     unsigned long rip;
307 
308     r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
309     if (r < 0 ) {
310         perror("KVM_GET_SREGS");
311         return;
312     }
313     r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
314     if (r < 0) {
315         perror("KVM_GET_REGS");
316         return;
317     }
318     rip = sregs.cs.base + regs.rip;
319     back_offset = regs.rip;
320     if (back_offset > 20) {
321         back_offset = 20;
322     }
323     *code_str = 0;
324     for (n = -back_offset; n < SHOW_CODE_LEN-back_offset; ++n) {
325         if (n == 0) {
326             strcat(code_str, " -->");
327         }
328         cpu_physical_memory_rw(rip + n, &code, 1, 1);
329         sprintf(code_str + strlen(code_str), " %02x", code);
330     }
331     fprintf(stderr, "code:%s\n", code_str);
332 }
333 
334 
335 /*
336  * Returns available msr list.  User must free.
337  */
kvm_get_msr_list(void)338 static struct kvm_msr_list *kvm_get_msr_list(void)
339 {
340     struct kvm_msr_list sizer, *msrs;
341     int r;
342 
343     sizer.nmsrs = 0;
344     r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, &sizer);
345     if (r < 0 && r != -E2BIG) {
346         return NULL;
347     }
348     /* Old kernel modules had a bug and could write beyond the provided
349        memory. Allocate at least a safe amount of 1K. */
350     msrs = qemu_malloc(MAX(1024, sizeof(*msrs) +
351                            sizer.nmsrs * sizeof(*msrs->indices)));
352 
353     msrs->nmsrs = sizer.nmsrs;
354     r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, msrs);
355     if (r < 0) {
356         free(msrs);
357         errno = r;
358         return NULL;
359     }
360     return msrs;
361 }
362 
print_seg(FILE * file,const char * name,struct kvm_segment * seg)363 static void print_seg(FILE *file, const char *name, struct kvm_segment *seg)
364 {
365     fprintf(stderr,
366             "%s %04x (%08llx/%08x p %d dpl %d db %d s %d type %x l %d"
367             " g %d avl %d)\n",
368             name, seg->selector, seg->base, seg->limit, seg->present,
369             seg->dpl, seg->db, seg->s, seg->type, seg->l, seg->g,
370             seg->avl);
371 }
372 
print_dt(FILE * file,const char * name,struct kvm_dtable * dt)373 static void print_dt(FILE *file, const char *name, struct kvm_dtable *dt)
374 {
375     fprintf(stderr, "%s %llx/%x\n", name, dt->base, dt->limit);
376 }
377 
kvm_show_regs(CPUState * env)378 void kvm_show_regs(CPUState *env)
379 {
380     struct kvm_regs regs;
381     struct kvm_sregs sregs;
382     int r;
383 
384     r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
385     if (r < 0) {
386         perror("KVM_GET_REGS");
387         return;
388     }
389     fprintf(stderr,
390             "rax %016llx rbx %016llx rcx %016llx rdx %016llx\n"
391             "rsi %016llx rdi %016llx rsp %016llx rbp %016llx\n"
392             "r8  %016llx r9  %016llx r10 %016llx r11 %016llx\n"
393             "r12 %016llx r13 %016llx r14 %016llx r15 %016llx\n"
394             "rip %016llx rflags %08llx\n",
395             regs.rax, regs.rbx, regs.rcx, regs.rdx,
396             regs.rsi, regs.rdi, regs.rsp, regs.rbp,
397             regs.r8,  regs.r9,  regs.r10, regs.r11,
398             regs.r12, regs.r13, regs.r14, regs.r15,
399             regs.rip, regs.rflags);
400     r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
401     if (r < 0) {
402         perror("KVM_GET_SREGS");
403         return;
404     }
405     print_seg(stderr, "cs", &sregs.cs);
406     print_seg(stderr, "ds", &sregs.ds);
407     print_seg(stderr, "es", &sregs.es);
408     print_seg(stderr, "ss", &sregs.ss);
409     print_seg(stderr, "fs", &sregs.fs);
410     print_seg(stderr, "gs", &sregs.gs);
411     print_seg(stderr, "tr", &sregs.tr);
412     print_seg(stderr, "ldt", &sregs.ldt);
413     print_dt(stderr, "gdt", &sregs.gdt);
414     print_dt(stderr, "idt", &sregs.idt);
415     fprintf(stderr, "cr0 %llx cr2 %llx cr3 %llx cr4 %llx cr8 %llx"
416             " efer %llx\n",
417             sregs.cr0, sregs.cr2, sregs.cr3, sregs.cr4, sregs.cr8,
418             sregs.efer);
419 }
420 
kvm_set_cr8(CPUState * env,uint64_t cr8)421 static void kvm_set_cr8(CPUState *env, uint64_t cr8)
422 {
423     env->kvm_run->cr8 = cr8;
424 }
425 
kvm_set_shadow_pages(kvm_context_t kvm,unsigned int nrshadow_pages)426 int kvm_set_shadow_pages(kvm_context_t kvm, unsigned int nrshadow_pages)
427 {
428 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
429     int r;
430 
431     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
432                   KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
433     if (r > 0) {
434         r = kvm_vm_ioctl(kvm_state, KVM_SET_NR_MMU_PAGES, nrshadow_pages);
435         if (r < 0) {
436             fprintf(stderr, "kvm_set_shadow_pages: %m\n");
437             return r;
438         }
439         return 0;
440     }
441 #endif
442     return -1;
443 }
444 
kvm_get_shadow_pages(kvm_context_t kvm,unsigned int * nrshadow_pages)445 int kvm_get_shadow_pages(kvm_context_t kvm, unsigned int *nrshadow_pages)
446 {
447 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
448     int r;
449 
450     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
451                   KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
452     if (r > 0) {
453         *nrshadow_pages = kvm_vm_ioctl(kvm_state, KVM_GET_NR_MMU_PAGES);
454         return 0;
455     }
456 #endif
457     return -1;
458 }
459 
460 #ifdef KVM_CAP_VAPIC
kvm_enable_tpr_access_reporting(CPUState * env)461 static int kvm_enable_tpr_access_reporting(CPUState *env)
462 {
463     int r;
464     struct kvm_tpr_access_ctl tac = { .enabled = 1 };
465 
466     r = kvm_ioctl(env->kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_VAPIC);
467     if (r <= 0) {
468         return -ENOSYS;
469     }
470     return kvm_vcpu_ioctl(env, KVM_TPR_ACCESS_REPORTING, &tac);
471 }
472 #endif
473 
474 #ifdef KVM_CAP_ADJUST_CLOCK
475 static struct kvm_clock_data kvmclock_data;
476 
kvmclock_pre_save(void * opaque)477 static void kvmclock_pre_save(void *opaque)
478 {
479     struct kvm_clock_data *cl = opaque;
480 
481     kvm_vm_ioctl(kvm_state, KVM_GET_CLOCK, cl);
482 }
483 
kvmclock_post_load(void * opaque,int version_id)484 static int kvmclock_post_load(void *opaque, int version_id)
485 {
486     struct kvm_clock_data *cl = opaque;
487 
488     return kvm_vm_ioctl(kvm_state, KVM_SET_CLOCK, cl);
489 }
490 
491 static const VMStateDescription vmstate_kvmclock= {
492     .name = "kvmclock",
493     .version_id = 1,
494     .minimum_version_id = 1,
495     .minimum_version_id_old = 1,
496     .pre_save = kvmclock_pre_save,
497     .post_load = kvmclock_post_load,
498     .fields      = (VMStateField []) {
499         VMSTATE_U64(clock, struct kvm_clock_data),
500         VMSTATE_END_OF_LIST()
501     }
502 };
503 #endif
504 
kvm_arch_qemu_create_context(void)505 int kvm_arch_qemu_create_context(void)
506 {
507     int r;
508     struct utsname utsname;
509 
510     uname(&utsname);
511     lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0;
512 
513     if (kvm_shadow_memory) {
514         kvm_set_shadow_pages(kvm_context, kvm_shadow_memory);
515     }
516 
517     /* initialize has_msr_star/has_msr_hsave_pa */
518     r = kvm_get_supported_msrs(kvm_state);
519     if (r < 0) {
520         return r;
521     }
522 
523     kvm_msr_list = kvm_get_msr_list();
524     if (!kvm_msr_list) {
525         return -1;
526     }
527 
528 #ifdef KVM_CAP_ADJUST_CLOCK
529     if (kvm_check_extension(kvm_state, KVM_CAP_ADJUST_CLOCK)) {
530         vmstate_register(NULL, 0, &vmstate_kvmclock, &kvmclock_data);
531     }
532 #endif
533 
534     r = kvm_set_boot_cpu_id(0);
535     if (r < 0 && r != -ENOSYS) {
536         return r;
537     }
538 
539     return 0;
540 }
541 
kvm_arch_save_mpstate(CPUState * env)542 static void kvm_arch_save_mpstate(CPUState *env)
543 {
544 #ifdef KVM_CAP_MP_STATE
545     int r;
546     struct kvm_mp_state mp_state;
547 
548     r = kvm_get_mpstate(env, &mp_state);
549     if (r < 0) {
550         env->mp_state = -1;
551     } else {
552         env->mp_state = mp_state.mp_state;
553         if (kvm_irqchip_in_kernel()) {
554             env->halted = (env->mp_state == KVM_MP_STATE_HALTED);
555         }
556     }
557 #else
558     env->mp_state = -1;
559 #endif
560 }
561 
kvm_arch_load_mpstate(CPUState * env)562 static void kvm_arch_load_mpstate(CPUState *env)
563 {
564 #ifdef KVM_CAP_MP_STATE
565     struct kvm_mp_state mp_state;
566 
567     /*
568      * -1 indicates that the host did not support GET_MP_STATE ioctl,
569      *  so don't touch it.
570      */
571     if (env->mp_state != -1) {
572         mp_state.mp_state = env->mp_state;
573         kvm_set_mpstate(env, &mp_state);
574     }
575 #endif
576 }
577 
578 #define XSAVE_CWD_RIP     2
579 #define XSAVE_CWD_RDP     4
580 #define XSAVE_MXCSR       6
581 #define XSAVE_ST_SPACE    8
582 #define XSAVE_XMM_SPACE   40
583 #define XSAVE_XSTATE_BV   128
584 #define XSAVE_YMMH_SPACE  144
585 
kvm_arch_load_regs(CPUState * env,int level)586 void kvm_arch_load_regs(CPUState *env, int level)
587 {
588     int rc;
589 
590     assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
591 
592     kvm_getput_regs(env, 1);
593 
594     kvm_put_xsave(env);
595     kvm_put_xcrs(env);
596 
597     kvm_put_sregs(env);
598 
599     rc = kvm_put_msrs(env, level);
600     if (rc < 0) {
601         perror("kvm__msrs FAILED");
602     }
603 
604     if (level >= KVM_PUT_RESET_STATE) {
605         kvm_arch_load_mpstate(env);
606         kvm_load_lapic(env);
607     }
608     if (level == KVM_PUT_FULL_STATE) {
609         if (env->kvm_vcpu_update_vapic) {
610             kvm_tpr_enable_vapic(env);
611         }
612     }
613 
614     kvm_put_vcpu_events(env, level);
615     kvm_put_debugregs(env);
616 
617     /* must be last */
618     kvm_guest_debug_workarounds(env);
619 }
620 
kvm_arch_save_regs(CPUState * env)621 void kvm_arch_save_regs(CPUState *env)
622 {
623     int rc;
624 
625     assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
626 
627     kvm_getput_regs(env, 0);
628 
629     kvm_get_xsave(env);
630     kvm_get_xcrs(env);
631 
632     kvm_get_sregs(env);
633 
634     rc = kvm_get_msrs(env);
635     if (rc < 0) {
636         perror("kvm_get_msrs FAILED");
637     }
638 
639     kvm_arch_save_mpstate(env);
640     kvm_save_lapic(env);
641     kvm_get_vcpu_events(env);
642     kvm_get_debugregs(env);
643 }
644 
_kvm_arch_init_vcpu(CPUState * env)645 static int _kvm_arch_init_vcpu(CPUState *env)
646 {
647     kvm_arch_reset_vcpu(env);
648 
649 #ifdef KVM_EXIT_TPR_ACCESS
650     kvm_enable_tpr_access_reporting(env);
651 #endif
652     return 0;
653 }
654 
kvm_arch_halt(CPUState * env)655 int kvm_arch_halt(CPUState *env)
656 {
657 
658     if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
659           (env->eflags & IF_MASK)) &&
660         !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
661         env->halted = 1;
662     }
663     return 1;
664 }
665 
kvm_arch_pre_run(CPUState * env,struct kvm_run * run)666 int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
667 {
668     if (!kvm_irqchip_in_kernel()) {
669         kvm_set_cr8(env, cpu_get_apic_tpr(env->apic_state));
670     }
671     return 0;
672 }
673 
kvm_arch_has_work(CPUState * env)674 int kvm_arch_has_work(CPUState *env)
675 {
676     if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
677          (env->eflags & IF_MASK)) ||
678         (env->interrupt_request & CPU_INTERRUPT_NMI)) {
679         return 1;
680     }
681     return 0;
682 }
683 
kvm_arch_try_push_interrupts(void * opaque)684 int kvm_arch_try_push_interrupts(void *opaque)
685 {
686     CPUState *env = cpu_single_env;
687     int r, irq;
688 
689     if (kvm_is_ready_for_interrupt_injection(env) &&
690         (env->interrupt_request & CPU_INTERRUPT_HARD) &&
691         (env->eflags & IF_MASK)) {
692         env->interrupt_request &= ~CPU_INTERRUPT_HARD;
693         irq = cpu_get_pic_interrupt(env);
694         if (irq >= 0) {
695             r = kvm_inject_irq(env, irq);
696             if (r < 0) {
697                 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
698             }
699         }
700     }
701 
702     return (env->interrupt_request & CPU_INTERRUPT_HARD) != 0;
703 }
704 
705 #ifdef KVM_CAP_USER_NMI
kvm_arch_push_nmi(void * opaque)706 void kvm_arch_push_nmi(void *opaque)
707 {
708     CPUState *env = cpu_single_env;
709     int r;
710 
711     if (likely(!(env->interrupt_request & CPU_INTERRUPT_NMI))) {
712         return;
713     }
714 
715     env->interrupt_request &= ~CPU_INTERRUPT_NMI;
716     r = kvm_inject_nmi(env);
717     if (r < 0) {
718         printf("cpu %d fail inject NMI\n", env->cpu_index);
719     }
720 }
721 #endif /* KVM_CAP_USER_NMI */
722 
kvm_reset_msrs(CPUState * env)723 static int kvm_reset_msrs(CPUState *env)
724 {
725     struct {
726         struct kvm_msrs info;
727         struct kvm_msr_entry entries[100];
728     } msr_data;
729     int n;
730     struct kvm_msr_entry *msrs = msr_data.entries;
731     uint32_t index;
732     uint64_t data;
733 
734     if (!kvm_msr_list) {
735         return -1;
736     }
737 
738     for (n = 0; n < kvm_msr_list->nmsrs; n++) {
739         index = kvm_msr_list->indices[n];
740         switch (index) {
741         case MSR_PAT:
742             data = 0x0007040600070406ULL;
743             break;
744         default:
745             data = 0;
746         }
747         kvm_msr_entry_set(&msrs[n], kvm_msr_list->indices[n], data);
748     }
749 
750     msr_data.info.nmsrs = n;
751 
752     return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
753 }
754 
755 
kvm_arch_cpu_reset(CPUState * env)756 void kvm_arch_cpu_reset(CPUState *env)
757 {
758     kvm_reset_msrs(env);
759     kvm_arch_reset_vcpu(env);
760 }
761 
762 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
kvm_arch_do_ioperm(void * _data)763 void kvm_arch_do_ioperm(void *_data)
764 {
765     struct ioperm_data *data = _data;
766     ioperm(data->start_port, data->num, data->turn_on);
767 }
768 #endif
769 
770 /*
771  * Setup x86 specific IRQ routing
772  */
kvm_arch_init_irq_routing(void)773 int kvm_arch_init_irq_routing(void)
774 {
775     int i, r;
776 
777     if (kvm_irqchip && kvm_has_gsi_routing()) {
778         kvm_clear_gsi_routes();
779         for (i = 0; i < 8; ++i) {
780             if (i == 2) {
781                 continue;
782             }
783             r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_MASTER, i);
784             if (r < 0) {
785                 return r;
786             }
787         }
788         for (i = 8; i < 16; ++i) {
789             r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
790             if (r < 0) {
791                 return r;
792             }
793         }
794         for (i = 0; i < 24; ++i) {
795             if (i == 0 && irq0override) {
796                 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, 2);
797             } else if (i != 2 || !irq0override) {
798                 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, i);
799             }
800             if (r < 0) {
801                 return r;
802             }
803         }
804         kvm_commit_irq_routes();
805     }
806     return 0;
807 }
808 
kvm_arch_process_irqchip_events(CPUState * env)809 void kvm_arch_process_irqchip_events(CPUState *env)
810 {
811     if (env->interrupt_request & CPU_INTERRUPT_INIT) {
812         kvm_cpu_synchronize_state(env);
813         do_cpu_init(env);
814     }
815     if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
816         kvm_cpu_synchronize_state(env);
817         do_cpu_sipi(env);
818     }
819 }
820