xref: /illumos-kvm-cmd/qemu-kvm-x86.c (revision 68396ea9)
1 /*
2  * qemu/kvm integration, x86 specific code
3  *
4  * Copyright (C) 2006-2008 Qumranet Technologies
5  *
6  * Licensed under the terms of the GNU GPL version 2 or higher.
7  */
8 
9 #include "config.h"
10 #include "config-host.h"
11 
12 #include <string.h>
13 #include "hw/hw.h"
14 #include "gdbstub.h"
15 #include <sys/io.h>
16 
17 #include "qemu-kvm.h"
18 #include "libkvm.h"
19 #include <pthread.h>
20 #include <sys/utsname.h>
21 #include <linux/kvm_para.h>
22 #include <sys/ioctl.h>
23 
24 #include "kvm.h"
25 #include "hw/apic.h"
26 
27 #define MSR_IA32_TSC            0x10
28 
29 static struct kvm_msr_list *kvm_msr_list;
30 extern unsigned int kvm_shadow_memory;
31 
32 int kvm_set_tss_addr(kvm_context_t kvm, unsigned long addr)
33 {
34     int r;
35 
36     r = kvm_vm_ioctl(kvm_state, KVM_SET_TSS_ADDR, addr);
37     if (r < 0) {
38         fprintf(stderr, "kvm_set_tss_addr: %m\n");
39         return r;
40     }
41     return 0;
42 }
43 
44 static int kvm_init_tss(kvm_context_t kvm)
45 {
46     int r;
47 
48     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_TSS_ADDR);
49     if (r > 0) {
50         /*
51          * this address is 3 pages before the bios, and the bios should present
52          * as unavaible memory
53          */
54         r = kvm_set_tss_addr(kvm, 0xfeffd000);
55         if (r < 0) {
56             fprintf(stderr, "kvm_init_tss: unable to set tss addr\n");
57             return r;
58         }
59     } else {
60         fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
61     }
62     return 0;
63 }
64 
65 static int kvm_set_identity_map_addr(kvm_context_t kvm, uint64_t addr)
66 {
67 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
68     int r;
69 
70     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
71     if (r > 0) {
72         r = kvm_vm_ioctl(kvm_state, KVM_SET_IDENTITY_MAP_ADDR, &addr);
73         if (r == -1) {
74             fprintf(stderr, "kvm_set_identity_map_addr: %m\n");
75             return -errno;
76         }
77         return 0;
78     }
79 #endif
80     return -ENOSYS;
81 }
82 
83 static int kvm_init_identity_map_page(kvm_context_t kvm)
84 {
85 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
86     int r;
87 
88     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
89     if (r > 0) {
90         /*
91          * this address is 4 pages before the bios, and the bios should present
92          * as unavaible memory
93          */
94         r = kvm_set_identity_map_addr(kvm, 0xfeffc000);
95         if (r < 0) {
96             fprintf(stderr, "kvm_init_identity_map_page: "
97                     "unable to set identity mapping addr\n");
98             return r;
99         }
100     }
101 #endif
102     return 0;
103 }
104 
105 static int kvm_create_pit(kvm_context_t kvm)
106 {
107 #ifdef KVM_CAP_PIT
108     int r;
109 
110     kvm_state->pit_in_kernel = 0;
111     if (!kvm->no_pit_creation) {
112         r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_PIT);
113         if (r > 0) {
114             r = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT);
115             if (r >= 0) {
116                 kvm_state->pit_in_kernel = 1;
117             } else {
118                 fprintf(stderr, "Create kernel PIC irqchip failed\n");
119                 return r;
120             }
121         }
122     }
123 #endif
124     return 0;
125 }
126 
127 int kvm_arch_create(kvm_context_t kvm, unsigned long phys_mem_bytes,
128                         void **vm_mem)
129 {
130     int r = 0;
131 
132     r = kvm_init_tss(kvm);
133     if (r < 0) {
134         return r;
135     }
136 
137     r = kvm_init_identity_map_page(kvm);
138     if (r < 0) {
139         return r;
140     }
141 
142     /*
143      * Tell fw_cfg to notify the BIOS to reserve the range.
144      */
145     if (e820_add_entry(0xfeffc000, 0x4000, E820_RESERVED) < 0) {
146         perror("e820_add_entry() table is full");
147         exit(1);
148     }
149 
150     r = kvm_create_pit(kvm);
151     if (r < 0) {
152         return r;
153     }
154 
155     r = kvm_init_coalesced_mmio(kvm);
156     if (r < 0) {
157         return r;
158     }
159 
160     return 0;
161 }
162 
163 #ifdef KVM_EXIT_TPR_ACCESS
164 
165 static int kvm_handle_tpr_access(CPUState *env)
166 {
167     struct kvm_run *run = env->kvm_run;
168     kvm_tpr_access_report(env,
169                           run->tpr_access.rip,
170                           run->tpr_access.is_write);
171     return 0;
172 }
173 
174 
175 int kvm_enable_vapic(CPUState *env, uint64_t vapic)
176 {
177     struct kvm_vapic_addr va = {
178         .vapic_addr = vapic,
179     };
180 
181     return kvm_vcpu_ioctl(env, KVM_SET_VAPIC_ADDR, &va);
182 }
183 
184 #endif
185 
186 int kvm_arch_run(CPUState *env)
187 {
188     int r = 0;
189     struct kvm_run *run = env->kvm_run;
190 
191     switch (run->exit_reason) {
192 #ifdef KVM_EXIT_SET_TPR
193     case KVM_EXIT_SET_TPR:
194         break;
195 #endif
196 #ifdef KVM_EXIT_TPR_ACCESS
197     case KVM_EXIT_TPR_ACCESS:
198         r = kvm_handle_tpr_access(env);
199         break;
200 #endif
201     default:
202         r = 1;
203         break;
204     }
205 
206     return r;
207 }
208 
209 #ifdef KVM_CAP_IRQCHIP
210 
211 int kvm_get_lapic(CPUState *env, struct kvm_lapic_state *s)
212 {
213     int r = 0;
214 
215     if (!kvm_irqchip_in_kernel()) {
216         return r;
217     }
218 
219     r = kvm_vcpu_ioctl(env, KVM_GET_LAPIC, s);
220     if (r < 0) {
221         fprintf(stderr, "KVM_GET_LAPIC failed\n");
222     }
223     return r;
224 }
225 
226 int kvm_set_lapic(CPUState *env, struct kvm_lapic_state *s)
227 {
228     int r = 0;
229 
230     if (!kvm_irqchip_in_kernel()) {
231         return 0;
232     }
233 
234     r = kvm_vcpu_ioctl(env, KVM_SET_LAPIC, s);
235 
236     if (r < 0) {
237         fprintf(stderr, "KVM_SET_LAPIC failed\n");
238     }
239     return r;
240 }
241 
242 #endif
243 
244 #ifdef KVM_CAP_PIT
245 
246 int kvm_get_pit(kvm_context_t kvm, struct kvm_pit_state *s)
247 {
248     if (!kvm_pit_in_kernel()) {
249         return 0;
250     }
251     return kvm_vm_ioctl(kvm_state, KVM_GET_PIT, s);
252 }
253 
254 int kvm_set_pit(kvm_context_t kvm, struct kvm_pit_state *s)
255 {
256     if (!kvm_pit_in_kernel()) {
257         return 0;
258     }
259     return kvm_vm_ioctl(kvm_state, KVM_SET_PIT, s);
260 }
261 
262 #ifdef KVM_CAP_PIT_STATE2
263 int kvm_get_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
264 {
265     if (!kvm_pit_in_kernel()) {
266         return 0;
267     }
268     return kvm_vm_ioctl(kvm_state, KVM_GET_PIT2, ps2);
269 }
270 
271 int kvm_set_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
272 {
273     if (!kvm_pit_in_kernel()) {
274         return 0;
275     }
276     return kvm_vm_ioctl(kvm_state, KVM_SET_PIT2, ps2);
277 }
278 
279 #endif
280 #endif
281 
282 int kvm_has_pit_state2(kvm_context_t kvm)
283 {
284     int r = 0;
285 
286 #ifdef KVM_CAP_PIT_STATE2
287     r = kvm_check_extension(kvm_state, KVM_CAP_PIT_STATE2);
288 #endif
289     return r;
290 }
291 
292 void kvm_show_code(CPUState *env)
293 {
294 #define SHOW_CODE_LEN 50
295     struct kvm_regs regs;
296     struct kvm_sregs sregs;
297     int r, n;
298     int back_offset;
299     unsigned char code;
300     char code_str[SHOW_CODE_LEN * 3 + 1];
301     unsigned long rip;
302 
303     r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
304     if (r < 0 ) {
305         perror("KVM_GET_SREGS");
306         return;
307     }
308     r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
309     if (r < 0) {
310         perror("KVM_GET_REGS");
311         return;
312     }
313     rip = sregs.cs.base + regs.rip;
314     back_offset = regs.rip;
315     if (back_offset > 20) {
316         back_offset = 20;
317     }
318     *code_str = 0;
319     for (n = -back_offset; n < SHOW_CODE_LEN-back_offset; ++n) {
320         if (n == 0) {
321             strcat(code_str, " -->");
322         }
323         cpu_physical_memory_rw(rip + n, &code, 1, 1);
324         sprintf(code_str + strlen(code_str), " %02x", code);
325     }
326     fprintf(stderr, "code:%s\n", code_str);
327 }
328 
329 
330 /*
331  * Returns available msr list.  User must free.
332  */
333 static struct kvm_msr_list *kvm_get_msr_list(void)
334 {
335     struct kvm_msr_list sizer, *msrs;
336     int r;
337 
338     sizer.nmsrs = 0;
339     r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, &sizer);
340     if (r < 0 && r != -E2BIG) {
341         return NULL;
342     }
343     /* Old kernel modules had a bug and could write beyond the provided
344        memory. Allocate at least a safe amount of 1K. */
345     msrs = qemu_malloc(MAX(1024, sizeof(*msrs) +
346                            sizer.nmsrs * sizeof(*msrs->indices)));
347 
348     msrs->nmsrs = sizer.nmsrs;
349     r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, msrs);
350     if (r < 0) {
351         free(msrs);
352         errno = r;
353         return NULL;
354     }
355     return msrs;
356 }
357 
358 static void print_seg(FILE *file, const char *name, struct kvm_segment *seg)
359 {
360     fprintf(stderr,
361             "%s %04x (%08llx/%08x p %d dpl %d db %d s %d type %x l %d"
362             " g %d avl %d)\n",
363             name, seg->selector, seg->base, seg->limit, seg->present,
364             seg->dpl, seg->db, seg->s, seg->type, seg->l, seg->g,
365             seg->avl);
366 }
367 
368 static void print_dt(FILE *file, const char *name, struct kvm_dtable *dt)
369 {
370     fprintf(stderr, "%s %llx/%x\n", name, dt->base, dt->limit);
371 }
372 
373 void kvm_show_regs(CPUState *env)
374 {
375     struct kvm_regs regs;
376     struct kvm_sregs sregs;
377     int r;
378 
379     r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
380     if (r < 0) {
381         perror("KVM_GET_REGS");
382         return;
383     }
384     fprintf(stderr,
385             "rax %016llx rbx %016llx rcx %016llx rdx %016llx\n"
386             "rsi %016llx rdi %016llx rsp %016llx rbp %016llx\n"
387             "r8  %016llx r9  %016llx r10 %016llx r11 %016llx\n"
388             "r12 %016llx r13 %016llx r14 %016llx r15 %016llx\n"
389             "rip %016llx rflags %08llx\n",
390             regs.rax, regs.rbx, regs.rcx, regs.rdx,
391             regs.rsi, regs.rdi, regs.rsp, regs.rbp,
392             regs.r8,  regs.r9,  regs.r10, regs.r11,
393             regs.r12, regs.r13, regs.r14, regs.r15,
394             regs.rip, regs.rflags);
395     r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
396     if (r < 0) {
397         perror("KVM_GET_SREGS");
398         return;
399     }
400     print_seg(stderr, "cs", &sregs.cs);
401     print_seg(stderr, "ds", &sregs.ds);
402     print_seg(stderr, "es", &sregs.es);
403     print_seg(stderr, "ss", &sregs.ss);
404     print_seg(stderr, "fs", &sregs.fs);
405     print_seg(stderr, "gs", &sregs.gs);
406     print_seg(stderr, "tr", &sregs.tr);
407     print_seg(stderr, "ldt", &sregs.ldt);
408     print_dt(stderr, "gdt", &sregs.gdt);
409     print_dt(stderr, "idt", &sregs.idt);
410     fprintf(stderr, "cr0 %llx cr2 %llx cr3 %llx cr4 %llx cr8 %llx"
411             " efer %llx\n",
412             sregs.cr0, sregs.cr2, sregs.cr3, sregs.cr4, sregs.cr8,
413             sregs.efer);
414 }
415 
416 static void kvm_set_cr8(CPUState *env, uint64_t cr8)
417 {
418     env->kvm_run->cr8 = cr8;
419 }
420 
421 int kvm_set_shadow_pages(kvm_context_t kvm, unsigned int nrshadow_pages)
422 {
423 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
424     int r;
425 
426     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
427                   KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
428     if (r > 0) {
429         r = kvm_vm_ioctl(kvm_state, KVM_SET_NR_MMU_PAGES, nrshadow_pages);
430         if (r < 0) {
431             fprintf(stderr, "kvm_set_shadow_pages: %m\n");
432             return r;
433         }
434         return 0;
435     }
436 #endif
437     return -1;
438 }
439 
440 int kvm_get_shadow_pages(kvm_context_t kvm, unsigned int *nrshadow_pages)
441 {
442 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
443     int r;
444 
445     r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
446                   KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
447     if (r > 0) {
448         *nrshadow_pages = kvm_vm_ioctl(kvm_state, KVM_GET_NR_MMU_PAGES);
449         return 0;
450     }
451 #endif
452     return -1;
453 }
454 
455 #ifdef KVM_CAP_VAPIC
456 static int kvm_enable_tpr_access_reporting(CPUState *env)
457 {
458     int r;
459     struct kvm_tpr_access_ctl tac = { .enabled = 1 };
460 
461     r = kvm_ioctl(env->kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_VAPIC);
462     if (r <= 0) {
463         return -ENOSYS;
464     }
465     return kvm_vcpu_ioctl(env, KVM_TPR_ACCESS_REPORTING, &tac);
466 }
467 #endif
468 
469 #ifdef KVM_CAP_ADJUST_CLOCK
470 static struct kvm_clock_data kvmclock_data;
471 
472 static void kvmclock_pre_save(void *opaque)
473 {
474     struct kvm_clock_data *cl = opaque;
475 
476     kvm_vm_ioctl(kvm_state, KVM_GET_CLOCK, cl);
477 }
478 
479 static int kvmclock_post_load(void *opaque, int version_id)
480 {
481     struct kvm_clock_data *cl = opaque;
482 
483     return kvm_vm_ioctl(kvm_state, KVM_SET_CLOCK, cl);
484 }
485 
486 static const VMStateDescription vmstate_kvmclock= {
487     .name = "kvmclock",
488     .version_id = 1,
489     .minimum_version_id = 1,
490     .minimum_version_id_old = 1,
491     .pre_save = kvmclock_pre_save,
492     .post_load = kvmclock_post_load,
493     .fields      = (VMStateField []) {
494         VMSTATE_U64(clock, struct kvm_clock_data),
495         VMSTATE_END_OF_LIST()
496     }
497 };
498 #endif
499 
500 int kvm_arch_qemu_create_context(void)
501 {
502     int r;
503     struct utsname utsname;
504 
505     uname(&utsname);
506     lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0;
507 
508     if (kvm_shadow_memory) {
509         kvm_set_shadow_pages(kvm_context, kvm_shadow_memory);
510     }
511 
512     /* initialize has_msr_star/has_msr_hsave_pa */
513     r = kvm_get_supported_msrs(kvm_state);
514     if (r < 0) {
515         return r;
516     }
517 
518     kvm_msr_list = kvm_get_msr_list();
519     if (!kvm_msr_list) {
520         return -1;
521     }
522 
523 #ifdef KVM_CAP_ADJUST_CLOCK
524     if (kvm_check_extension(kvm_state, KVM_CAP_ADJUST_CLOCK)) {
525         vmstate_register(NULL, 0, &vmstate_kvmclock, &kvmclock_data);
526     }
527 #endif
528 
529     r = kvm_set_boot_cpu_id(0);
530     if (r < 0 && r != -ENOSYS) {
531         return r;
532     }
533 
534     return 0;
535 }
536 
537 static void kvm_arch_save_mpstate(CPUState *env)
538 {
539 #ifdef KVM_CAP_MP_STATE
540     int r;
541     struct kvm_mp_state mp_state;
542 
543     r = kvm_get_mpstate(env, &mp_state);
544     if (r < 0) {
545         env->mp_state = -1;
546     } else {
547         env->mp_state = mp_state.mp_state;
548         if (kvm_irqchip_in_kernel()) {
549             env->halted = (env->mp_state == KVM_MP_STATE_HALTED);
550         }
551     }
552 #else
553     env->mp_state = -1;
554 #endif
555 }
556 
557 static void kvm_arch_load_mpstate(CPUState *env)
558 {
559 #ifdef KVM_CAP_MP_STATE
560     struct kvm_mp_state mp_state;
561 
562     /*
563      * -1 indicates that the host did not support GET_MP_STATE ioctl,
564      *  so don't touch it.
565      */
566     if (env->mp_state != -1) {
567         mp_state.mp_state = env->mp_state;
568         kvm_set_mpstate(env, &mp_state);
569     }
570 #endif
571 }
572 
573 #define XSAVE_CWD_RIP     2
574 #define XSAVE_CWD_RDP     4
575 #define XSAVE_MXCSR       6
576 #define XSAVE_ST_SPACE    8
577 #define XSAVE_XMM_SPACE   40
578 #define XSAVE_XSTATE_BV   128
579 #define XSAVE_YMMH_SPACE  144
580 
581 void kvm_arch_load_regs(CPUState *env, int level)
582 {
583     int rc;
584 
585     assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
586 
587     kvm_getput_regs(env, 1);
588 
589     kvm_put_xsave(env);
590     kvm_put_xcrs(env);
591 
592     kvm_put_sregs(env);
593 
594     rc = kvm_put_msrs(env, level);
595     if (rc < 0) {
596         perror("kvm__msrs FAILED");
597     }
598 
599     if (level >= KVM_PUT_RESET_STATE) {
600         kvm_arch_load_mpstate(env);
601         kvm_load_lapic(env);
602     }
603     if (level == KVM_PUT_FULL_STATE) {
604         if (env->kvm_vcpu_update_vapic) {
605             kvm_tpr_enable_vapic(env);
606         }
607     }
608 
609     kvm_put_vcpu_events(env, level);
610     kvm_put_debugregs(env);
611 
612     /* must be last */
613     kvm_guest_debug_workarounds(env);
614 }
615 
616 void kvm_arch_save_regs(CPUState *env)
617 {
618     int rc;
619 
620     assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
621 
622     kvm_getput_regs(env, 0);
623 
624     kvm_get_xsave(env);
625     kvm_get_xcrs(env);
626 
627     kvm_get_sregs(env);
628 
629     rc = kvm_get_msrs(env);
630     if (rc < 0) {
631         perror("kvm_get_msrs FAILED");
632     }
633 
634     kvm_arch_save_mpstate(env);
635     kvm_save_lapic(env);
636     kvm_get_vcpu_events(env);
637     kvm_get_debugregs(env);
638 }
639 
640 static int _kvm_arch_init_vcpu(CPUState *env)
641 {
642     kvm_arch_reset_vcpu(env);
643 
644 #ifdef KVM_EXIT_TPR_ACCESS
645     kvm_enable_tpr_access_reporting(env);
646 #endif
647     return 0;
648 }
649 
650 int kvm_arch_halt(CPUState *env)
651 {
652 
653     if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
654           (env->eflags & IF_MASK)) &&
655         !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
656         env->halted = 1;
657     }
658     return 1;
659 }
660 
661 int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
662 {
663     if (!kvm_irqchip_in_kernel()) {
664         kvm_set_cr8(env, cpu_get_apic_tpr(env->apic_state));
665     }
666     return 0;
667 }
668 
669 int kvm_arch_has_work(CPUState *env)
670 {
671     if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
672          (env->eflags & IF_MASK)) ||
673         (env->interrupt_request & CPU_INTERRUPT_NMI)) {
674         return 1;
675     }
676     return 0;
677 }
678 
679 int kvm_arch_try_push_interrupts(void *opaque)
680 {
681     CPUState *env = cpu_single_env;
682     int r, irq;
683 
684     if (kvm_is_ready_for_interrupt_injection(env) &&
685         (env->interrupt_request & CPU_INTERRUPT_HARD) &&
686         (env->eflags & IF_MASK)) {
687         env->interrupt_request &= ~CPU_INTERRUPT_HARD;
688         irq = cpu_get_pic_interrupt(env);
689         if (irq >= 0) {
690             r = kvm_inject_irq(env, irq);
691             if (r < 0) {
692                 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
693             }
694         }
695     }
696 
697     return (env->interrupt_request & CPU_INTERRUPT_HARD) != 0;
698 }
699 
700 #ifdef KVM_CAP_USER_NMI
701 void kvm_arch_push_nmi(void *opaque)
702 {
703     CPUState *env = cpu_single_env;
704     int r;
705 
706     if (likely(!(env->interrupt_request & CPU_INTERRUPT_NMI))) {
707         return;
708     }
709 
710     env->interrupt_request &= ~CPU_INTERRUPT_NMI;
711     r = kvm_inject_nmi(env);
712     if (r < 0) {
713         printf("cpu %d fail inject NMI\n", env->cpu_index);
714     }
715 }
716 #endif /* KVM_CAP_USER_NMI */
717 
718 static int kvm_reset_msrs(CPUState *env)
719 {
720     struct {
721         struct kvm_msrs info;
722         struct kvm_msr_entry entries[100];
723     } msr_data;
724     int n;
725     struct kvm_msr_entry *msrs = msr_data.entries;
726     uint32_t index;
727     uint64_t data;
728 
729     if (!kvm_msr_list) {
730         return -1;
731     }
732 
733     for (n = 0; n < kvm_msr_list->nmsrs; n++) {
734         index = kvm_msr_list->indices[n];
735         switch (index) {
736         case MSR_PAT:
737             data = 0x0007040600070406ULL;
738             break;
739         default:
740             data = 0;
741         }
742         kvm_msr_entry_set(&msrs[n], kvm_msr_list->indices[n], data);
743     }
744 
745     msr_data.info.nmsrs = n;
746 
747     return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
748 }
749 
750 
751 void kvm_arch_cpu_reset(CPUState *env)
752 {
753     kvm_reset_msrs(env);
754     kvm_arch_reset_vcpu(env);
755 }
756 
757 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
758 void kvm_arch_do_ioperm(void *_data)
759 {
760     struct ioperm_data *data = _data;
761     ioperm(data->start_port, data->num, data->turn_on);
762 }
763 #endif
764 
765 /*
766  * Setup x86 specific IRQ routing
767  */
768 int kvm_arch_init_irq_routing(void)
769 {
770     int i, r;
771 
772     if (kvm_irqchip && kvm_has_gsi_routing()) {
773         kvm_clear_gsi_routes();
774         for (i = 0; i < 8; ++i) {
775             if (i == 2) {
776                 continue;
777             }
778             r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_MASTER, i);
779             if (r < 0) {
780                 return r;
781             }
782         }
783         for (i = 8; i < 16; ++i) {
784             r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
785             if (r < 0) {
786                 return r;
787             }
788         }
789         for (i = 0; i < 24; ++i) {
790             if (i == 0 && irq0override) {
791                 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, 2);
792             } else if (i != 2 || !irq0override) {
793                 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, i);
794             }
795             if (r < 0) {
796                 return r;
797             }
798         }
799         kvm_commit_irq_routes();
800     }
801     return 0;
802 }
803 
804 void kvm_arch_process_irqchip_events(CPUState *env)
805 {
806     if (env->interrupt_request & CPU_INTERRUPT_INIT) {
807         kvm_cpu_synchronize_state(env);
808         do_cpu_init(env);
809     }
810     if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
811         kvm_cpu_synchronize_state(env);
812         do_cpu_sipi(env);
813     }
814 }
815